axi_write.svg#
axi_write.py#
1import ta
2from ta_py_lib.commands import *
3from ta_py_lib.axi_models import *
4
5td_name = 'axi_write'
6td = new_timing_diagram(td_name, 0, 1600, 'ns', 20)
7
8axi_mstr = axi_master_simple()
9axi_mstr.write('A1', ['D1', 'D2', 'D3', 'D4'])
10
11l1 = text('L1', 'BVALID', 4, 0, font_color='red')
12l2 = text('L2', 'BVALID', 5, 0, font_color='red')
13l3 = text('L3', 'BVALID', 6, 0, font_color='red')
14t1 = text('T1', 'BVALID', 7, 0, font_color='blue')
15t2 = text('T2', 'BVALID', 8, 0, font_color='blue')
16t3 = text('T3', 'BVALID', 9, 0, font_color='blue')
17t4 = text('T4', 'BVALID', 10, 0, font_color='blue')
18l4 = text('L4', 'BVALID', 11, 0, font_color='red')
19l5 = text('L5', 'BVALID', 12, 0, font_color='red')
20l6 = text('L6', 'BVALID', 13, 0, font_color='red')
21
22ta.set_end_time(160)
23ta.simulate()
24ta.save_svg(td_name)
With the TimingAnalyzer, the user can create elborate timing diagrams with simple Python scripts. Publishing quality scalable diagrams are output in the Scalable Vector Format(.svg). Models that create timing diagrams for standard protocols will be included in a Python library. The script above uses the axi_master_simple model. Logic delays and constraints can be used to perform timing analysis with the new gate level logic simulation engine.
This version of the app is written in C++ with a C API Python interface. Standard Python 3 scripts are run from the command line to generate the diagrams and perform timing analysis.
The Java App#
The version is no longer supported. It was created more than 20 years ago and development continueed for years after until there wasn’t much demand for tools like this.
I have included the link to the documentation. TimingAnalyzer.